Electrical News

The DAPDNA-2 Dynamically Reconfigurable Processor has proven performance superiority surpassing that of conventional solutions including FPGAs, DSPs, and CPUs, particularly in fields such as image processing, networking, security, and scientific research. Currently, more than 20 companies have selected the DAPDNA-2 for use in commercial systems. Beginning in 2005, IPFlex is increasing its efforts to provide solutions appropriate to all phases of customers' development process, from algorithm optimization to systems validation.

Koichi Hagishima, President and CEO of IPFlex, states: "In March 2004 IPFlex introduced the DAPDNA-2 Dynamically Reconfigurable Processor. The introduction was the start of the paradigm shift in semiconductor industry. Sales of our DAPDNA-FW II Integrated Development Environment have now reached 200 licenses. We believe this is a sign of strong support by our customers designing diversified products. IPFlex will continue to provide the optimal solutions for our customers' applications."

About the DAPDNA-FW II Integrated Development Environment

The DAPDNA-FW II Integrated Development Environment is a powerful set of tools that cover the entire process of developing applications for the DAPDNA-2 Dynamically Reconfigurable Processor, from algorithm design to validation on the actual device. This development environment provides the following major advantages.

Support for a variety of development methodologies
The DAPDNA-FW II supports three different design methodologies, giving the designer the flexibility to choose the design method.

DFC Compiler***
Allows design using Data Flow C (DFC), an extended C programming language. This allows design at a high level of abstraction, with little awareness of the particulars of the hardware. This method makes design easy, portable, and shortens the design cycle time.

DAPDNA Development Tools for MATLAB/Simulink

This package provides a link to MATLAB/Simulink for direct algorithm design and verification on DAPDNA-2. This tool integrates Simulink and MATLAB with DAPDNA-FW II, allowing the designer to efficiently leverage existing MATLAB/Simulink assets.

DNA Designer
This GUI-based tool allows the designer to drag-and-drop DAPDNA-2 processing elements represented as blocks, as a dataflow. This tool provides a dramatically higher level of abstraction compared to the conventional gate-level or RTL-level design tools.

Design productivity improvement
DAPDNA-FW II includes a general-purpose DNA Library which helps wring out all the performance possible from the incredibly flexible, high-performance DAPDNA-2 and increases design productivity. The environment also features a wide variety of convenient simulation tools such a waveform viewer, memory viewer, resource manager, and power consumption viewer.

About the DAPDNA-2 Dynamically Reconfigurable Processor
DAPDNA-2 is a dual-core processor, comprised of a high-performance RISC processor core, called the DAP, and the dynamically reconfigurable core, DNA, a two-dimensional array of 376 processing elements (PEs). DAPDNA-2 can change its hardware configuration to provide the optimal circuitry for an application on demand. This configuration change can take place not only when the system is designed, but also during operation, dynamically, in a single clock cycle****, to meet the instantaneous change in needs of applications implemented by the system.

Terminology
*DAPDNA: Digital Application Processor, Distributed Network Architecture.
**Dynamically Reconfigurable Processor: A processor capable of changing chip circuitry dynamically.
***DFC Compiler: Co-developed with Celoxica Ltd.
**** a single clock cycle: One clock switching operation is possible by creating configuration information beforehand and storing in the background configuration banks.